Planarization of thin films is ubiquitously practiced in the manufacture of semiconductor devices such as integrated circuit devices. Commonly, chemical mechanical polishing (CMP) is performed after deposition of a thin film such as tungsten (W) in order to planarize and/or remove material of the thin film. For example, in replacement gate transistor technology the CMP may be used to create a tungsten replacement metal gate transistor, or may be used to leave columns of tungsten above the source and drain areas of transistors as contacts to current-carrying lines arranged in layers above the transistor.
CMP has several drawbacks including the inability to provide flatness across a wafer (substrate), dishing, erosion, as well as chemical selectivity to underlying areas.
In addition to CMP approaches, techniques have been developed to remove thin film material and planarize the layer using ions. Known processing techniques using ions may, while removing polycrystalline material in particular, generate unwanted levels of surface roughness of the film being treated. This roughness may be a result of the significantly different sputter yields for different facets of a crystal, such as tungsten metal. The resultant polycrystalline layer roughness may generate undesirable IC processing yield, and may limit thin film thickness measurements using standard optical metrology methods such as Ellipsometry, Reflectometry and Scatterometry.
With respect to these and other considerations the present disclosure is provided.